With the popularity of portable consumer electronic devices, such as smart phones, tablet computers, and so forth, numerous packaging technologies are geared towards electronics miniaturization and densification. Embedding integrated circuit dies into substrates is one of these packaging technologies with a strong potential. Embedding techniques provide a three-dimensional (3D) configuration that offers an attractive interconnect solution without wire bonding, with improved thermal and electrical performance, and the potential to reduce manufacturing cost for complex products.
FIG. 1 shows a conventional substrate structure 10 with an embedded die 12. The substrate structure 10 includes a core layer 14 having a cavity 16. The die 12 is mounted within the cavity 16 by a mounting material 18. The die 12 includes a die body 20, die conductive elements 22 on a top surface of the die body 20 and a dielectric layer 24 over the die conductive elements 22. The substrate structure 10 also includes substrate conductive elements 26 formed over a portion of a top surface of the core layer 14. Each of the substrate conductive elements 26 is electronically coupled to a corresponding one of the die conductive elements 22 through one of the electronic vias 28. In addition, there are via structures 30 coupled to the substrate conductive elements 26 and formed through the whole substrate structure 10. Outer substrate layers 32 are formed over the core layer 14 to encapsulate the die 12. The substrate structure 10 is a 3D apparatus, which utilizes the die conductive elements 22, the substrate conductive elements 26, and the via structures 30 to electronically redistribute the die 12 to a top surface of the substrate structure 10 without increasing the footprint of the substrate structure 10.
However, for some applications, only embedding a die into a substrate may not meet the size and performance requirement. Passive components and trace length from the substrate to the passive components largely affect the size of the whole design. The trace length from the substrate to the passive components also affects the parasitic capacitance and inductance of the design, and thereby affects load fluctuations and noise of the design.
Accordingly, there remains a need for improved substrate designs with embedded dies to obtain further miniaturization and densification without sacrificing electronic performance or increasing manufacturing complexity.